74LV138
3-to-8 line decoder/demultiplexer; inverting
The 74LV138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LV138 features three enable inputs (Y1, Y2 and E3). Every output will be HIGH unless Y1 and Y2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74LV138 to a 1-of-32 (5 to 32 lines) decoder with just four 74LV138 ICs and one inverter. The 74LV138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.
Features and benefits
Wide supply voltage range from 1.0 to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
CMOS low power dissipation
Direct interface with TTL levels
Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C
Demultiplexing capability
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
參數(shù)類型
| 型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|
| 74LV138BQ | 1.0?-?5.5 | TTL | ± 12 | 12 | low | -40~125 | 83 | 6.5 | 50 | DHVQFN16 |
| 74LV138D | 1.0?-?5.5 | TTL | ± 12 | 12 | low | -40~125 | 81 | 4.5 | 39.5 | SO16 |
| 74LV138PW | 1.0?-?5.5 | TTL | ± 12 | 12 | low | -40~125 | 115 | 2.2 | 43 | TSSOP16 |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LV138BQ | 74LV138BQ,115 (935285577115) |
Active | LV138 |
DHVQFN16 (SOT763-1) |
SOT763-1 | SOT763-1_115 | |
| 74LV138D | 74LV138D,118 (935063190118) |
Active | 74LV138D |
SO16 (SOT109-1) |
SOT109-1 |
SO-SOJ-REFLOW
SO-SOJ-WAVE WAVE_BG-BD-1 |
SOT109-1_118 |
| 74LV138PW | 74LV138PW,118 (935174390118) |
Active | LV138 |
TSSOP16 (SOT403-1) |
SOT403-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT403-1_118 |
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LV138DB | 74LV138DB,112 (935165960112) |
Obsolete | no package information | ||||
| 74LV138DB,118 (935165960118) |
Obsolete | ||||||
文檔 (18)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74LV138 | 3-to-8 line decoder/demultiplexer; inverting | Data sheet | 2024-01-23 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| mna370 | Block diagram: 74LVC138ABQ, 74LVC138AD, 74LVC138ADB, 74LVC138APW, 74AHC138BQ, 74AHC138D, 74AHC138PW, 74AHCT138BQ, 74AHCT138D, 74AHCT138PW, 74LV138BQ, 74LV138D, 74LV138DB, 74LV138N, 74LV138PW | Block diagram | 2009-11-04 |
| SOT763-1 | 3D model for products with SOT763-1 package | Design support | 2019-10-03 |
| SOT109-1 | 3D model for products with SOT109-1 package | Design support | 2020-01-22 |
| SOT403-1 | 3D model for products with SOT403-1 package | Design support | 2020-01-22 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| DHVQFN16_SOT763-1_mk | plastic, dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 0.85 mm body | Marcom graphics | 2017-01-28 |
| SO16_SOT109-1_mk | plastic, small outline package; 16 leads; 1.27 mm pitch; 9.9 mm x 3.9 mm x 1.35 mm body | Marcom graphics | 2017-01-28 |
| TSSOP16_SOT403-1_mk | plastic, thin shrink small outline package; 16 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
| SOT763-1 | plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 1 mm body | Package information | 2023-05-11 |
| SOT109-1 | plastic, small outline package; 16 leads; 1.27 mm pitch; 9.9 mm x 3.9 mm x 1.75 mm body | Package information | 2023-11-07 |
| SOT403-1 | plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-08 |
| SO-SOJ-REFLOW | Footprint for reflow soldering | Reflow soldering | 2009-10-08 |
| lv | lv Spice model | SPICE model | 2013-05-07 |
| SO-SOJ-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
支持
如果您需要設(shè)計/技術(shù)支持，請告知我們并填寫 應(yīng)答表 我們會盡快回復(fù)您。
模型
樣品
作為 Nexperia 的客戶，您可以通過我們的銷售機構(gòu)訂購樣品。
如果您沒有 Nexperia 的直接賬戶，我們的全球和地區(qū)分銷商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。