74LVC1G86-Q100
2-input EXCLUSIVE-OR gate
The 74LVC1G86-Q100 provides the 2-input EXCLUSIVE-OR function.
Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
Overvoltage tolerant inputs to 5.5 V
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
±24 mA output drive (VCC = 3.0 V)
CMOS low power dissipation
IOFF circuitry provides partial Power-down mode operation
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
參數(shù)類型
| 型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC1G86GV-Q100 | 1.65?-?5.5 | CMOS/LVTTL | ± 32 | 2.4 | 150 | 1 | low | -40~125 | 270 | 63.3 | 169 | TSOP5 |
| 74LVC1G86GW-Q100 | 1.65?-?5.5 | CMOS/LVTTL | ± 32 | 2.4 | 150 | 1 | low | -40~125 | 311 | 80.9 | 181 | TSSOP5 |
| 74LVC1G86GZ-Q100 | 1.65?-?5.5 | CMOS/LVTTL | low | -40~125 | XSON5 |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVC1G86GV-Q100 | 74LVC1G86GV‑Q100H (935302544125) |
Active | V86 |
TSOP5 (SOT753) |
SOT753 |
WAVE_BG-BD-1
|
SOT753_125 |
| 74LVC1G86GW-Q100 | 74LVC1G86GW‑Q100H (935302545125) |
Active | VH |
TSSOP5 (SOT353-1) |
SOT353-1 |
WAVE_BG-BD-1
|
SOT353-1_125 |
| 74LVC1G86GZ-Q100 | 74LVC1G86GZ‑Q100YL (935691732315) |
Active | VH |
XSON5 (SOT8065-1) |
SOT8065-1 | SOT8065-1_315 |
環(huán)境信息
| 型號 | 可訂購的器件編號 | 化學成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVC1G86GV-Q100 | 74LVC1G86GV‑Q100H | 74LVC1G86GV-Q100 |
|
|
| 74LVC1G86GW-Q100 | 74LVC1G86GW‑Q100H | 74LVC1G86GW-Q100 |
|
|
| 74LVC1G86GZ-Q100 | 74LVC1G86GZ‑Q100YL | 74LVC1G86GZ-Q100 |
|
|
文檔 (19)
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| 74LVC1G86_Q100 | 2-input EXCLUSIVE-OR gate | Data sheet | 2024-11-13 |
| AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| mna038 | Block diagram: 74AHC1G86GV, 74AHC1G86GW, 74AHCT1G86GV, 74AHCT1G86GW, 74HC1G86GV, 74HC1G86GW, 74HCT1G86GV, 74HCT1G86GW, 74LVC1G86GF, 74LVC1G86GM, 74LVC1G86GV, 74LVC1G86GW | Block diagram | 2009-11-04 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| SOT753 | 3D model for products with SOT753 package | Design support | 2019-01-22 |
| SOT353-1 | 3D model for products with SOT353-1 package | Design support | 2019-09-23 |
| SOT8065-1 | 3D model for products with SOT8065-1 package | Design support | 2024-11-05 |
| lvc1g86 | 74LVC1G86 IBIS model | IBIS model | 2014-10-20 |
| Nexperia_document_leaflet_Logic_X2SON_packages_062018 | X2SON ultra-small 4, 5, 6 & 8-pin leadless packages | Leaflet | 2018-06-05 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| Leaflet_SOT8065_Minilogic | Leaflet_SOT8065 Minilogic | Leaflet | 2024-11-15 |
| TSSOP5_SOT353-1_mk | plastic, thin shrink small outline package; 5 leads; 0.65 mm pitch; 2 mm x 1.25 mm x 0.95 mm body | Marcom graphics | 2018-07-25 |
| SOT753 | plastic, surface-mounted package; 5 leads; 0.95 mm pitch; 2.9 mm x 1.5 mm x 1 mm body | Package information | 2022-05-31 |
| SOT353-1 | plastic thin shrink small outline package; 5 leads; body width 1.25 mm | Package information | 2022-11-15 |
| SOT8065-1 | Plastic thermal enhanced extremely thin small outline package withside-wettable flanks (SWF); no leads; 5 terminals; body 1.1 × 0.85 × 0.5mm | Package information | 2024-08-28 |
| MAR_SOT753 | MAR_SOT753 Topmark | Top marking | 2013-06-03 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
支持
如果您需要設計/技術支持，請告知我們并填寫 應答表 我們會盡快回復您。
模型
Ordering, pricing & availability
樣品
作為 Nexperia 的客戶，您可以通過我們的銷售機構(gòu)訂購樣品。
如果您沒有 Nexperia 的直接賬戶，我們的全球和地區(qū)分銷商網(wǎng)絡可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。