74AUP2G00
Low-power dual 2-input NAND gate
The 74AUP2G00 provides dual 2-input NAND function.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
Low static power consumption; ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數(shù)類型
| 型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AUP2G00DC | 0.8?-?3.6 | CMOS | ± 1.9 | 8.3 | 70 | 2 | ultra low | -40~125 | 203 | 34.1 | 113 | VSSOP8 |
| 74AUP2G00GN | 0.8?-?3.6 | CMOS | ± 1.9 | 8.3 | 70 | 2 | ultra low | -40~125 | 238 | 10.6 | 148 | XSON8 |
| 74AUP2G00GS | 0.8?-?3.6 | CMOS | ± 1.9 | 8.3 | 70 | 2 | ultra low | -40~125 | 276 | 10.8 | 146 | XSON8 |
| 74AUP2G00GT | 0.8?-?3.6 | CMOS | ± 1.9 | 8.3 | 70 | 2 | ultra low | -40~125 | 327 | 6.1 | 157 | XSON8 |
| 74AUP2G00GX | 0.8?-?3.6 | CMOS | ± 1.9 | 8.3 | 70 | 2 | ultra low | -40~125 | X2SON8 |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74AUP2G00DC | 74AUP2G00DC,125 (935280706125) |
Active | p00 |
VSSOP8 (SOT765-1) |
SOT765-1 | SOT765-1_125 | |
| 74AUP2G00GN | 74AUP2G00GN,115 (935292217115) |
Active | pA |
XSON8 (SOT1116) |
SOT1116 | SOT1116_115 | |
| 74AUP2G00GS | 74AUP2G00GS,115 (935292778115) |
Active | pA |
XSON8 (SOT1203) |
SOT1203 | SOT1203_115 | |
| 74AUP2G00GT | 74AUP2G00GT,115 (935280707115) |
Active | p00 |
XSON8 (SOT833-1) |
SOT833-1 | SOT833-1_115 | |
| 74AUP2G00GX | 74AUP2G00GXX (935308439115) |
Active | pA |
X2SON8 (SOT1233-2) |
SOT1233-2 | SOT1233-2_115 |
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74AUP2G00GD | 74AUP2G00GD,125 (935286841125) |
Obsolete | p00 Standard Procedure Standard Procedure |
XSON8 (SOT996-2) |
SOT996-2 | SOT996-2_125 | |
| 74AUP2G00GF | 74AUP2G00GF,115 (935291473115) |
Obsolete | no package information | ||||
| 74AUP2G00GM | 74AUP2G00GM,125 (935281423125) |
Obsolete | no package information | ||||
環(huán)境信息
| 型號 | 可訂購的器件編號 | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74AUP2G00DC | 74AUP2G00DC,125 | 74AUP2G00DC |
|
|
| 74AUP2G00GN | 74AUP2G00GN,115 | 74AUP2G00GN |
|
|
| 74AUP2G00GS | 74AUP2G00GS,115 | 74AUP2G00GS |
|
|
| 74AUP2G00GT | 74AUP2G00GT,115 | 74AUP2G00GT |
|
|
| 74AUP2G00GX | 74AUP2G00GXX | 74AUP2G00GX |
|
|
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號 | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74AUP2G00GD | 74AUP2G00GD,125 | 74AUP2G00GD |
|
|
| 74AUP2G00GF | 74AUP2G00GF,115 | 74AUP2G00GF |
|
|
| 74AUP2G00GM | 74AUP2G00GM,125 | 74AUP2G00GM |
|
|
文檔 (28)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74AUP2G00 | Low-power dual 2-input NAND gate | Data sheet | 2024-08-12 |
| AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
| AN11052 | Pin FMEA for AUP family | Application note | 2019-01-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| 001aah748 | Block diagram: 74AUP2G00DC, 74AUP2G00GD, 74AUP2G00GM, 74AUP2G00GT, 74LVC2G00DC, 74LVC2G00DP, 74LVC2G00GD, 74LVC2G00GM, 74LVC2G00GT | Block diagram | 2009-11-03 |
| mna099 | Block diagram: 74AHC2G00DC, 74AHC2G00DP, 74AHC2G00GD, 74AHCT2G00DC, 74AHCT2G00DP, 74AHCT2G00GD, 74AUP1G00GM, 74AUP1G00GW, 74AUP2G00DC, 74AUP2G00GD, 74AUP2G00GM, 74AUP2G00GT, 74HC2G00DC, 74HC2G00DP, 74HC2G00GD, 74HCT2G00DC, 74HCT2G00DP, 74HCT2G00GD | Block diagram | 2009-11-04 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
| SOT765-1 | 3D model for products with SOT765-1 package | Design support | 2020-01-22 |
| SOT1116 | 3D model for products with SOT1116 package | Design support | 2023-02-02 |
| SOT1203 | 3D model for products with SOT1203 package | Design support | 2023-02-02 |
| SOT833-1 | 3D model for products with SOT833-1 package | Design support | 2021-01-28 |
| SOT1233-2 | 3D model for products with SOT1233-2 package | Design support | 2021-01-28 |
| aup2g00 | aup2g00 IBIS model | IBIS model | 2013-04-07 |
| Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Leaflet | 2019-04-12 |
| Nexperia_document_leaflet_Logic_X2SON_packages_062018 | X2SON ultra-small 4, 5, 6 & 8-pin leadless packages | Leaflet | 2018-06-05 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| VSSOP8_SOT765-1_mk | plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body | Marcom graphics | 2017-01-28 |
| XSON8_SOT1203_mk | plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body | Marcom graphics | 2019-02-04 |
| SOT765-1 | plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body | Package information | 2022-06-03 |
| SOT996-2 | plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 3 mm x 2 mm x 0.5 mm body | Package information | 2020-04-21 |
| SOT1116 | plastic, leadless extremely thin small outline package; 8 terminals; 0.3 mm pitch; 1.2 mm x 1 mm x 0.35 mm body | Package information | 2022-06-02 |
| SOT1203 | plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body | Package information | 2022-06-03 |
| SOT833-1 | plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1 mm x 1.95 mm x 0.5 mm body | Package information | 2022-06-03 |
| SOT1233-2 | plastic thermal enhanced extremely thin small outline package; no leads;8 terminals; body 1.35 x 0.8 x 0.32 mm | Package information | 2022-04-21 |
| MAR_SOT1116 | MAR_SOT1116 Topmark | Top marking | 2013-06-03 |
| MAR_SOT1203 | MAR_SOT1203 Topmark | Top marking | 2013-06-03 |
| MAR_SOT833 | MAR_SOT833 Topmark | Top marking | 2013-06-03 |
支持
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模型
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| SOT765-1 | 3D model for products with SOT765-1 package | Design support | 2020-01-22 |
| SOT1116 | 3D model for products with SOT1116 package | Design support | 2023-02-02 |
| SOT1203 | 3D model for products with SOT1203 package | Design support | 2023-02-02 |
| SOT833-1 | 3D model for products with SOT833-1 package | Design support | 2021-01-28 |
| SOT1233-2 | 3D model for products with SOT1233-2 package | Design support | 2021-01-28 |
| aup2g00 | aup2g00 IBIS model | IBIS model | 2013-04-07 |
Ordering, pricing & availability
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