74LVC4066
Quad bilateral switch
The 74LVC4066 is a high-speed Si-gate CMOS device.
The 74LVC4066 provides four single pole, single-throw analog switch functions. Each switch has two input/output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is LOW, the analog switch is turned off.
Schmitt-trigger action at the enable inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 1.65 V to 5.5 V.
Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
Very low ON resistance:
7.5 Ω (typical) at VCC = 2.7 V
6.5 Ω (typical) at VCC = 3.3 V
6 Ω (typical) at VCC = 5 V
Switch current capability of 32 mA
High noise immunity
CMOS low-power consumption
Direct interface TTL-levels
Latch-up performance exceeds 250 mA
Enable inputs accept voltages up to 5 V
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數(shù)類型
| 型號 | Configuration | VCC (V) | Logic switching levels | RON (Ω) | RON(FLAT) (Ω) | f(-3dB) (MHz) | THD (%) | Xtalk (dB) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC4066BQ | SPST-NO | 1.65?-?5.5 | CMOS/LVTTL | 15 | 1.5 | 440 | 0.005 | - | very low | -40~125 | 103 | 18.5 | 71 | DHVQFN14 |
| 74LVC4066BZ | SPST-NO | 1.65?-?5.5 | CMOS/LVTTL | 15 | 1.5 | 440 | 0.005 | - | very low | -40~125 | DHXQFN14 | |||
| 74LVC4066D | SPST-NO | 1.65?-?5.5 | CMOS/LVTTL | 15 | 1.5 | 440 | 0.005 | - | very low | -40~125 | 104 | 17.7 | 63 | SO14 |
| 74LVC4066PW | SPST-NO | 1.65?-?5.5 | CMOS/LVTTL | 15 | 1.5 | 440 | 0.005 | - | very low | -40~125 | 138 | 6.1 | 64.3 | TSSOP14 |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVC4066BQ | 74LVC4066BQ,115 (935273744115) |
Active | C4066 |
DHVQFN14 (SOT762-1) |
SOT762-1 | SOT762-1_115 | |
| 74LVC4066BZ | 74LVC4066BZZ (935692167147) |
Active | V46 |
DHXQFN14 (SOT8014-1) |
SOT8014-1 | SOT8014-1_147 | |
| 74LVC4066D | 74LVC4066D,118 (935273717118) |
Active | 74LVC4066D |
SO14 (SOT108-1) |
SOT108-1 |
SO-SOJ-REFLOW
SO-SOJ-WAVE WAVE_BG-BD-1 |
SOT108-1_118 |
| 74LVC4066PW | 74LVC4066PW,118 (935273718118) |
Active | LVC4066 |
TSSOP14 (SOT402-1) |
SOT402-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT402-1_118 |
環(huán)境信息
| 型號 | 可訂購的器件編號 | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVC4066BQ | 74LVC4066BQ,115 | 74LVC4066BQ |
|
|
| 74LVC4066BZ | 74LVC4066BZZ | 74LVC4066BZ |
|
|
| 74LVC4066D | 74LVC4066D,118 | 74LVC4066D |
|
|
| 74LVC4066PW | 74LVC4066PW,118 | 74LVC4066PW |
|
|
文檔 (22)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74LVC4066 | Quad bilateral switch | Data sheet | 2025-05-06 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| AN263 | Power considerations when using CMOS and BiCMOS logic devices | Application note | 2023-02-07 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| mna658 | Block diagram: 74LVC1G66GF, 74LVC1G66GM, 74LVC1G66GV, 74LVC1G66GW, 74LVC4066BQ, 74LVC4066D, 74LVC4066PW | Block diagram | 2009-11-04 |
| SOT762-1 | 3D model for products with SOT762-1 package | Design support | 2019-10-03 |
| SOT8014-1 | 3D model for products with SOT8014-1 package | Design support | 2023-02-02 |
| SOT108-1 | 3D model for products with SOT108-1 package | Design support | 2020-01-22 |
| SOT402-1 | 3D model for products with SOT402-1 package | Design support | 2023-02-02 |
| lvc4066 | LVC4066 IBIS model | IBIS model | 2020-05-14 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| DHVQFN14_SOT762-1_mk | plastic, dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; 0.5 mm pitch; 2.5 mm x 3 mm x 0.85 mm body | Marcom graphics | 2017-01-28 |
| SO14_SOT108-1_mk | plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body | Marcom graphics | 2017-01-28 |
| TSSOP14_SOT402-1_mk | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
| SOT762-1 | plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 14 terminals; 0.5 mm pitch; 2.5 x 3 x 1 mm body | Package information | 2023-04-05 |
| SOT8014-1 | plastic, leadless dual in-line compatible thermal enhanced extreme thin quad flat package;no leads; 14 terminals; 0.4 mm pitch; body 2 mm x 2 mm x 0.48 mm | Package information | 2023-02-28 |
| SOT108-1 | plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body | Package information | 2023-11-07 |
| SOT402-1 | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-07 |
| SO-SOJ-REFLOW | Footprint for reflow soldering | Reflow soldering | 2009-10-08 |
| SO-SOJ-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
支持
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模型
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| SOT762-1 | 3D model for products with SOT762-1 package | Design support | 2019-10-03 |
| SOT8014-1 | 3D model for products with SOT8014-1 package | Design support | 2023-02-02 |
| SOT108-1 | 3D model for products with SOT108-1 package | Design support | 2020-01-22 |
| SOT402-1 | 3D model for products with SOT402-1 package | Design support | 2023-02-02 |
| lvc4066 | LVC4066 IBIS model | IBIS model | 2020-05-14 |
Ordering, pricing & availability
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