74HC173-Q100; 74HCT173-Q100
Quad D-type flip-flop; positive-edge trigger; 3-state
The 74HC173-Q100; 74HCT173-Q100 is a quad positive-edge triggered D-type flip-flop. The device features clock (CP), master reset (MR), two input enable (E1, E2) and two output enable (OE1, OE2) inputs. When the input enables are LOW, the outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on either input enable will cause the device to go into a hold mode, outputs hold their previous state independently of clock and data inputs. A HIGH on MR forces the outputs LOW independently of clock and data inputs. A HIGH on either output enable pin causes the outputs to assume a high-impedance OFF-state. Operation of the output enable inputs does not affect the state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Complies with JEDEC standard no. 7A
Input levels:
For 74HC173-Q100: CMOS level
For 74HCT173-Q100: TTL level
Gated input enable for hold (do nothing) mode
Gated output enable control mode
Edge-triggered D-type register
Asynchronous master reset
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
參數類型
| 型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HC173D-Q100 | 2.0?-?6.0 | CMOS | ± 7.8 | 17 | 88 | low | -40~125 | 72 | 1 | 30 | SO16 |
| 74HCT173D-Q100 | 4.5?-?5.5 | TTL | ± 6 | 17 | 88 | low | -40~125 | 72 | 1 | 30 | SO16 |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74HC173D-Q100 | 74HC173D‑Q100J (935691581118) |
Active | 74HC173D |
SO16 (SOT109-1) |
SOT109-1 |
SO-SOJ-REFLOW
SO-SOJ-WAVE WAVE_BG-BD-1 |
SOT109-1_118 |
| 74HCT173D-Q100 | 74HCT173D‑Q100J (935691597118) |
Active | 74HCT173D |
SO16 (SOT109-1) |
SOT109-1 |
SO-SOJ-REFLOW
SO-SOJ-WAVE WAVE_BG-BD-1 |
SOT109-1_118 |
環(huán)境信息
| 型號 | 可訂購的器件編號 | 化學成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74HC173D-Q100 | 74HC173D‑Q100J | 74HC173D-Q100 |
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| 74HCT173D-Q100 | 74HCT173D‑Q100J | 74HCT173D-Q100 |
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文檔 (9)
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| 74HC_HCT173_Q100 | Quad D-type flip-flop; positive-edge trigger; 3-state | Data sheet | 2024-01-15 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| SOT109-1 | 3D model for products with SOT109-1 package | Design support | 2020-01-22 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SO16_SOT109-1_mk | plastic, small outline package; 16 leads; 1.27 mm pitch; 9.9 mm x 3.9 mm x 1.35 mm body | Marcom graphics | 2017-01-28 |
| SOT109-1 | plastic, small outline package; 16 leads; 1.27 mm pitch; 9.9 mm x 3.9 mm x 1.75 mm body | Package information | 2023-11-07 |
| SO-SOJ-REFLOW | Footprint for reflow soldering | Reflow soldering | 2009-10-08 |
| SO-SOJ-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
支持
如果您需要設計/技術支持，請告知我們并填寫 應答表 我們會盡快回復您。
模型
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| SOT109-1 | 3D model for products with SOT109-1 package | Design support | 2020-01-22 |
Ordering, pricing & availability
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