外形圖
| 封裝版本 | 封裝名稱 | 封裝說明 | 參考 | 發(fā)行日期 |
|---|---|---|---|---|
| SOT833-1 | XSON8 | plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1 mm x 1.95 mm x 0.5 mm body | MO-252 (JEDEC) | 2007-12-07 |
Boards
| Part number | Description | Type | Quick links | Shop link |
|---|---|---|---|---|
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描述 NEVB-LOGIC02 is a dual in-line logic footprint adapter board, designed to simplify the evaluation of Nexperia logic devices by offering several package footprints.
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類型 Evaluation board
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Quick links
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Shop link
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相關文檔
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
| SOT833-1 | 3D model for products with SOT833-1 package | Design support | 2021-01-28 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT833-1 | plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1 mm x 1.95 mm x 0.5 mm body | Package information | 2022-06-03 |
| SOT833-1_115 | XSON8; Reel pack for SMD, 7''; Q1/T1 product orientation | Packing information | 2020-04-21 |
| MAR_SOT833 | MAR_SOT833 Topmark | Top marking | 2013-06-03 |
采用此封裝的產品
Analog & Logic ICs
| 型號 | 描述 | 快速訪問 |
|---|---|---|
| 74AUP1G885GT | Low-power dual function gate | |
| 74AUP2G00GT | Low-power dual 2-input NAND gate | |
| 74AUP2G02GT | Low-power dual 2-input NOR gate | |
| 74AUP2G08GT | Low-power dual 2-input AND gate | |
| 74AUP2G132GT | Low-power dual 2-input NAND Schmitt trigger | |
| 74AUP2G157GT | Low-power 2-input multiplexer | |
| 74AUP2G32GT | Low-power dual 2-input OR gate | |
| 74AUP2G38GT | Low-power dual 2-input NAND gate; open drain | |
| 74AUP2G79GT | Low-power dual D-type flip-flop; positive-edge trigger | |
| 74AUP2G80GT | Low-power dual D-type flip-flop; positive-edge trigger | |
| 74AUP2G86GT | Low-power dual 2-input EXCLUSIVE-OR gate | |
| 74AUP3G0434GT | Low-power dual inverter and single buffer | |
| 74AUP3G3404GT | Low-power dual buffer and single inverter | |
| 74AVC2T45GT-Q100 | Dual-bit, dual-supply voltage level translator/transceiver; 3-state | |
| 74AVC2T45GT | Dual-bit, dual-supply voltage level translator/transceiver; 3-state | |
| 74LVC1G74GT-Q100 | Single D-type flip-flop with set and reset; positive edge trigger | |
| 74LVC1G74GT | Single D-type flip-flop with set and reset; positive edge trigger | |
| 74LVC1G99GT | Ultra-configurable multiple function gate; 3-state | |
| 74LVC2G00GT | Dual 2-input NAND gate | |
| 74LVC2G02GT | Dual 2-input NOR gate | |
| 74LVC2G08GT | Dual 2-input AND gate | |
| 74LVC2G32GT | Dual 2-input OR gate | |
| 74LVC2G38GT | Dual 2-input NAND gate; open drain | |
| 74LVC2G74GT | Single D-type flip-flop with set and reset; positive edge trigger | |
| 74LVC2G86GT | Dual 2-input EXCLUSIVE-OR gate | |
| 74LVC2T45GT-Q100 | Dual supply translating transceiver; 3-state | |
| 74LVC2T45GT | Dual supply translating transceiver; 3-state | |
| 74LVCH2T45GT | Dual supply translating transceiver; 3-state | |
| NXU0102GT-Q100 | 2-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state | |
| NXU0102GT | 2-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state | |
| NXU0202GT-Q100 | 2-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state | |
| NXU0202GT | 2-bit dual-supply buffer/level translator with Schmitt-trigger inputs; 3-state | |
| 74AHC3G04GT | Inverter | |
| 74AVC9112GT | 1-to-4 fan-out buffer | |
| 74AHCT3G14GT | Triple inverting Schmitt trigger | |
| 74AUP3G04GT | Low-power triple inverter | |
| 74AUP2G125GT | Low-power dual buffer/line driver; 3-state | |
| 74AUP2G126GT | Low-power dual buffer/line driver; 3-state | |
| 74AUP3G17GT | Low-power triple Schmitt trigger | |
| 74AUP2G241GT | Low-power dual buffer/line driver; 3-state | |
| 74AHC3G14GT | Triple inverting Schmitt trigger | |
| 74AUP2G240GT | Low-power dual inverting buffer/line driver; 3-state | |
| 74AUP3G14GT | Low-power triple Schmitt trigger inverter | |
| 74AUP3G07GT | Low-power triple buffer with open-drain output | |
| 74AUP3G34GT | Low-power triple buffer | |
| 74LVC3G17GT | Triple non-inverting Schmitt trigger with 5 V tolerant input | |
| 74LVC2G240GT | Dual inverting buffer/line driver; 3-state | |
| 74LVC3G06GT | Triple inverter with open-drain output | |
| 74LVC3G14GT | Triple inverting Schmitt trigger with 5 V tolerant input | |
| 74LVC3G07GT | Triple buffer with open-drain output | |
| XC7WH14GT | Triple inverting Schmitt trigger | |
| 74LVC2G126GT | Dual bus buffer/line driver; 3-state | |
| 74LVC2G241GT | Dual buffer/line driver; 3-state | |
| 74LVC3GU04GT | Triple unbuffered inverter | |
| 74LVC3G34GT | Triple buffer | |
| 74LVC3G04GT | Triple inverter | |
| 74LVC2G125GT | Dual bus buffer/line driver; 3-state | |
| 74CBTLV3306GT | 2-bit bus switch | |
| CBT3306GT | Dual bus switch | |
| CBTD3306GT | Dual bus switch with level shifting | |
| 74LVC2G53GT | 2-channel analog multiplexer/demultiplexer | |
| 74HC2G66GT | Dual single-pole single-throw analog switch | |
| 74HCT2G66GT | Dual single-pole single-throw analog switch | |
| 74LVC1G53GT | 2-channel analog multiplexer/demultiplexer | |
| 74LVC2G66GT | Bilateral switch | |
| 74LVCV2G66GT | Overvoltage tolerant bilateral switch | |
| 74AVCH2T45GT | Dual-bit, dual-supply voltage level translator/transceiver; 3-state | |
| 74AUP1G74GT | Low-power D-type flip-flop with set and reset; positive-edge trigger | |
| 74LVC1G123GT | Single retriggerable monostable multivibrator; Schmitt trigger inputs | |
| NXS0102GT | Dual supply translating transceiver; open drain; auto direction sensing | |
| NXB0102GT | Dual supply translating transceiver; auto direction sensing; 3-state |
Automotive qualified products (AEC-Q100/Q101)
| 型號 | 描述 | 快速訪問 |
|---|---|---|
| 74AVC2T45GT-Q100 | Dual-bit, dual-supply voltage level translator/transceiver; 3-state | |
| 74LVC1G74GT-Q100 | Single D-type flip-flop with set and reset; positive edge trigger | |
| 74LVC2T45GT-Q100 | Dual supply translating transceiver; 3-state | |
| NXU0102GT-Q100 | 2-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state | |
| NXU0202GT-Q100 | 2-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state |