外形圖
| 封裝版本 | 封裝名稱 | 封裝說(shuō)明 | 參考 | 發(fā)行日期 |
|---|---|---|---|---|
| SOT886 | XSON6 | plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm body | MO-252 (JEDEC) | 2004-07-22 |
Boards
| Part number | Description | Type | Quick links | Shop link |
|---|---|---|---|---|
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描述 NEVB-LOGIC02 is a dual in-line logic footprint adapter board, designed to simplify the evaluation of Nexperia logic devices by offering several package footprints.
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類(lèi)型 Evaluation board
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Quick links
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Shop link
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相關(guān)文檔
| 文件名稱 | 標(biāo)題 | 類(lèi)型 | 日期 |
|---|---|---|---|
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
| SOT886 | 3D model for products with SOT886 package | Design support | 2019-10-03 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| DFN1410-6_SOT886_mk | plastic, extremely thin small outline package; no leads; 6 terminals; 0.6 mm pitch; 1 mm x 1.45 mm x 0.5 mm body | Marcom graphics | 2017-01-28 |
| XSON6_SOT886_mk | plastic, extremely thin small outline package; no leads; 6 terminals; 0.6 mm pitch; 1 mm x 1.45 mm x 0.5 mm body | Marcom graphics | 2017-01-28 |
| SOT886 | plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm body | Package information | 2022-06-01 |
| SOT886_115 | XSON6; Reel pack for SMD, 7''; Q1/T1 product orientation | Packing information | 2020-04-21 |
| SOT886_125 | XSON6; Reel pack for SMD, 7''; Q3/T4 product orientation | Packing information | 2022-12-21 |
| SOT886_132 | XSON6; Reel pack for SMD, 7''; Q3/T4 product orientation | Packing information | 2020-04-21 |
| MAR_SOT886 | MAR_SOT886 Topmark | Top marking | 2013-06-03 |
采用此封裝的產(chǎn)品
Analog & Logic ICs
| 型號(hào) | 描述 | 快速訪問(wèn) |
|---|---|---|
| 74AUP1G00GM | Low-power 2-input NAND gate | |
| 74AUP1G0832GM | Low-power 3-input AND-OR gate | |
| 74AUP1G08GM-Q100 | Low-power 2-input AND gate | |
| 74AUP1G08GM | Low-power 2-input AND gate | |
| 74AUP1G11GM | Low-power 3-input AND gate | |
| 74AUP1G175GM | Low-power D-type flip-flop with reset; positive-edge trigger | |
| 74AUP1G18GM | Low-power 1-of-2 demultiplexer with 3-state deselected output | |
| 74AUP1G3208GM | Low-power 3-input OR-AND gate | |
| 74AUP1G32GM-Q100 | Low-power 2-input OR-gate | |
| 74AUP1G332GM | Low-power 3-input OR-gate | |
| 74AUP1G02GM | Low-power 2-input NOR gate | |
| 74AUP1G09GM | Low-power 2-input AND gate with open-drain | |
| 74AUP1G125GM-Q100 | Low-power buffer/line driver; 3-state | |
| 74AUP1G132GM | Low-power 2-input NAND Schmitt trigger | |
| 74AUP1G157GM-Q100 | Low-power 2-input multiplexer | |
| 74AUP1G158GM | Low-power 2-input multiplexer; inverting | |
| 74AUP1G19GM | Low-power 1-of-2 decoder/demultiplexer | |
| 74AUP1G32GM | Low-power 2-input OR-gate | |
| 74AUP1G373GM | Low-power D-type transparent latch; 3-state | |
| 74AUP1G374GM | Low-power D-type flip-flop; positive-edge trigger; 3-state | |
| 74AUP1G386GM | Low-power 3-input EXCLUSIVE-OR gate | |
| 74AUP1G38GM | Low-power 2-input NAND gate (open drain) | |
| 74AUP1G57GM | Low-power configurable multiple function gate | |
| 74AUP1G58GM | Low-power configurable multiple function gate | |
| 74AUP1G79GM | Low-power D-type flip-flop; positive-edge trigger | |
| 74AUP1G80GM | Low-power D-type flip-flop; positive-edge trigger | |
| 74AUP1G86GM | Low-power 2-input EXCLUSIVE-OR gate | |
| 74AUP1G97GM | Low-power configurable multiple function gate | |
| 74AUP1G98GM | Low-power configurable multiple function gate | |
| 74AUP1T34GM-Q100 | Low-power dual supply translating buffer | |
| 74AUP1T34GM | Low-power dual supply translating buffer | |
| 74AUP1T45GM | Low-power dual supply translating transceiver; 3-state | |
| 74AUP1T57GM | Low-power configurable gate with voltage-level translator | |
| 74AUP1T58GM | Low-power configurable gate with voltage-level translator | |
| 74AUP1T97GM | Low-power configurable gate with voltage-level translator | |
| 74AUP1T98GM | Low-power configurable gate with voltage-level translator | |
| 74AUP1Z04GM | Low-power X-tal driver with enable and internal resistor | |
| 74AUP1Z125GM | Low-power X-tal driver with enable and internal resistor; 3-state | |
| 74AUP2G0604GM | Low-power inverting buffer with open-drain and inverter | |
| 74AUP2G3404GM | Low-power buffer and inverter | |
| 74AUP2G3407GM | Low-power single buffer; single buffer with open-drain | |
| 74AUP2GU04GM-Q100 | Low-power dual unbuffered inverter | |
| 74AVC1T45GM-Q100 | Dual-supply voltage level translator/transceiver; 3-state | |
| 74AVC1T45GM | Dual-supply voltage level translator/transceiver; 3-state | |
| 74AVCH1T45GM | Dual-supply voltage level translator/transceiver; 3-state | |
| 74LVC1G00GM | Single 2-input NAND gate | |
| 74LVC1G02GM | Single 2-input NOR gate | |
| 74LVC1G08GM-Q100 | Single 2-input AND gate | |
| 74LVC1G08GM | Single 2-input AND gate | |
| 74LVC1G10GM | Single 3-input NAND gate | |
| 74LVC1G11GM | Single 3-input AND gate | |
| 74LVC1G125GM-Q100 | Bus buffer/line driver; 3-state | |
| 74LVC1G14GM-Q100 | Single Schmitt trigger inverter | |
| 74LVC1G175GM | Single D-type flip-flop with reset; positive-edge trigger | |
| 74LVC1G17GM-Q100 | Single Schmitt trigger buffer | |
| 74LVC1G19GM | 1-of-2 decoder/demultiplexer | |
| 74LVC1G27GM | Single 3-input NOR gate | |
| 74LVC1G32GM-Q100 | Single 2-input OR gate | |
| 74LVC1G32GM | Single 2-input OR gate | |
| 74LVC1G332GM | Single 3-input OR gate | |
| 74LVC1G58GM | Low-power configurable multiple function gate | |
| 74LVC1G80GM | Single D-type flip-flop; positive-edge trigger | |
| 74LVC1G86GM | 2-input EXCLUSIVE-OR gate | |
| 74LVC1G98GM | Low-power configurable multiple function gate | |
| 74LVC1G38GM | 2-input NAND gate; open drain | |
| 74LVC1G57GM | Low-power configurable multiple function gate | |
| 74LVC1G79GM | Single D-type flip-flop; positive-edge trigger | |
| 74LVC1G97GM | Low-power configurable multiple function gate | |
| 74LVC1T45GM-Q100 | Dual supply translating transceiver; 3-state | |
| 74LVC1T45GM | Dual supply translating transceiver; 3-state | |
| 74LVC2G14GM-Q100 | Dual inverting Schmitt trigger with 5 V tolerant input | |
| 74LVC2G34GM-Q100 | Dual buffer gate | |
| 74LVC2GU04GM-Q100 | Dual unbuffered inverter | |
| 74LVCH1T45GM | Dual supply translating transceiver; 3-state | |
| AXP1T34GM | Dual supply translating buffer | |
| LSF0101GM | 1-bit bidirectional multi-voltage level translator; open-drain; push-pull | |
| NXU0101GM-Q100 | 1-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state | |
| NXU0101GM | 1-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state | |
| 74AHC1G126GM | Bus buffer/line driver; 3-state | |
| 74AHCT1G04GM | Inverter | |
| 74AHCT1G125GM | Bus buffer/line driver; 3-state | |
| 74AUP1G04GM | Low-power inverter | |
| 74AUP1G14GM | Low-power Schmitt trigger inverter | |
| 74AUP1G17GM | Low-power Schmitt trigger | |
| 74AUP1G16GM | Low-power buffer | |
| 74AUP2G17GM | Low-power dual Schmitt trigger | |
| 74AUP1G126GM | Low-power buffer/line driver; 3-state | |
| 74AUP1G240GM | Low-power inverting buffer/line driver; 3-state | |
| 74AUP2G34GM | Low-power dual buffer | |
| 74AUP1GU04GM | Low-power unbuffered inverter | |
| 74AUP2G14GM | Low-power dual Schmitt trigger inverter | |
| 74AHC1G04GM | Inverter | |
| 74AHC1G125GM | Bus buffer/line driver; 3-state | |
| 74AHCT1G126GM | Bus buffer/line driver; 3-state | |
| 74AUP1G06GM | Low-power inverter with open-drain output | |
| 74AUP1G07GM | Low-power buffer with open-drain output | |
| 74AUP1G125GM | Low-power buffer/line driver; 3-state | |
| 74AUP1G34GM | Low-power buffer | |
| 74AUP2G16GM | Low-power dual buffer | |
| 74AUP2G06GM | Low-power dual inverter with open-drain output | |
| 74AUP2G04GM | Low-power dual inverter | |
| 74AUP2G07GM | Low-power dual buffer with open-drain output | |
| 74AUP2GU04GM | Low-power dual unbuffered inverter | |
| 74LVC1G07GM | Buffer with open-drain output | |
| 74LVC1G240GM | Single inverting buffer/line driver; 3-state | |
| 74LVC2G34GM | Dual buffer gate | |
| 74LVC1GU04GM | Unbuffered inverter | |
| 74LVC2G04GM | Dual inverter | |
| 74LVC2GU04GM | Dual unbuffered inverter | |
| 74LVC1G16GM | Single buffer | |
| 74LVC1G06GM | Inverter with open-drain output | |
| 74LVC1G125GM | Bus buffer/line driver; 3-state | |
| 74LVC1G14GM | Single Schmitt-trigger inverter | |
| 74LVC2G17GM | Dual non-inverting Schmitt trigger with 5 V tolerant input | |
| 74LVC1G17GM | Single Schmitt trigger buffer | |
| 74LVC1G04GM | Single inverter | |
| 74LVC1G34GM | Single buffer | |
| 74LVC1G126GM | Bus buffer/line driver; 3-state | |
| 74LVC2G14GM | Dual inverting Schmitt trigger with 5 V tolerant input | |
| 74LVC2G06GM | Inverters with open-drain outputs | |
| 74LVC2G16GM | Dual buffer gate | |
| XC7SH125GM | Bus buffer/line driver; 3-state | |
| 74LVC2G07GM | Buffers with open-drain outputs | |
| XC7SET125GM | Bus buffer/line driver; 3-state | |
| 74CBTLV1G125GM | Single bus switch | |
| XS3A1T3157GM | Low-ohmic single-pole double-throw analog switch | |
| XS3A1T5157GM | Low-ohmic single-pole double-throw analog switch | |
| 74LVC1G66GM | Bilateral switch | |
| 74LVC1G384GM | Bilateral switch | |
| 74AUP1G157GM | Low-power 2-input multiplexer | |
| 74LVC1G3157GM-Q100 | 10 Ohm single-pole double-throw analog switch | |
| 74LVC1G3157GM | 10 Ohm single-pole double-throw analog switch | |
| 74LVC1G157GM | Single 2-input multiplexer | |
| 74LVC1G157GM-Q100 | Single 2-input multiplexer | |
| NXB0101GM | Dual supply translating transceiver; auto direction sensing; 3-state | |
| NXS0101GM | Dual supply translating transceiver; open drain; auto direction sensing |
Automotive qualified products (AEC-Q100/Q101)
| 型號(hào) | 描述 | 快速訪問(wèn) |
|---|---|---|
| 74AUP1G08GM-Q100 | Low-power 2-input AND gate | |
| 74AUP1G32GM-Q100 | Low-power 2-input OR-gate | |
| 74AUP1G125GM-Q100 | Low-power buffer/line driver; 3-state | |
| 74AUP1G157GM-Q100 | Low-power 2-input multiplexer | |
| 74AUP1T34GM-Q100 | Low-power dual supply translating buffer | |
| 74AUP2GU04GM-Q100 | Low-power dual unbuffered inverter | |
| 74AVC1T45GM-Q100 | Dual-supply voltage level translator/transceiver; 3-state | |
| 74LVC1G08GM-Q100 | Single 2-input AND gate | |
| 74LVC1G125GM-Q100 | Bus buffer/line driver; 3-state | |
| 74LVC1G14GM-Q100 | Single Schmitt trigger inverter | |
| 74LVC1G17GM-Q100 | Single Schmitt trigger buffer | |
| 74LVC1G32GM-Q100 | Single 2-input OR gate | |
| 74LVC1T45GM-Q100 | Dual supply translating transceiver; 3-state | |
| 74LVC2G14GM-Q100 | Dual inverting Schmitt trigger with 5 V tolerant input | |
| 74LVC2G34GM-Q100 | Dual buffer gate | |
| 74LVC2GU04GM-Q100 | Dual unbuffered inverter | |
| NXU0101GM-Q100 | 1-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state | |
| PESD5V0L4UF | Low capacitance unidirectional quadruple ESD protection diode arrays | |
| PESD3V3L5UF | Low capacitance unidirectional fivefold ESD protection diode array | |
| PESD3V3L4UF | Low capacitance unidirectional quadruple ESD protection diode arrays | |
| PESD3V3S4UF | Unidirectional quadruple ESD protection diode arrays | |
| PESD5V0L5UF | Low capacitance unidirectional fivefold ESD protection diode arrays | |
| PESD5V0S4UF | Unidirectional quadruple ESD protection diode arrays | |
| PESD5V0U4BF | Ultra low capacitance bidirectional quadruple ESD protection array | |
| PESD5V0U5BF | Ultra low capacitance bidirectional fivefold ESD protection array | |
| PRTR5V0U2F | Ultra low capacitance double rail-to-rail ESD protection | |
| 74LVC1G3157GM-Q100 | 10 Ohm single-pole double-throw analog switch | |
| 74LVC1G157GM-Q100 | Single 2-input multiplexer |
ESD protection, TVS, filtering and signal conditioning
| 型號(hào) | 描述 | 快速訪問(wèn) |
|---|---|---|
| PESD5V0L4UF | Low capacitance unidirectional quadruple ESD protection diode arrays | |
| PESD3V3L5UF | Low capacitance unidirectional fivefold ESD protection diode array | |
| PESD3V3L4UF | Low capacitance unidirectional quadruple ESD protection diode arrays | |
| PESD3V3S4UF | Unidirectional quadruple ESD protection diode arrays | |
| PESD5V0L5UF | Low capacitance unidirectional fivefold ESD protection diode arrays | |
| PESD5V0S4UF | Unidirectional quadruple ESD protection diode arrays | |
| PESD5V0U4BF | Ultra low capacitance bidirectional quadruple ESD protection array | |
| PESD5V0U5BF | Ultra low capacitance bidirectional fivefold ESD protection array | |
| PRTR5V0U2F | Ultra low capacitance double rail-to-rail ESD protection |