可訂購(gòu)部件
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 訂購(gòu)代碼(12NC) | 封裝 | 從經(jīng)銷商處購(gòu)買(mǎi) |
|---|---|---|---|---|
| 74AUP2G58DP | 74AUP2G58DPJ | 935304476118 | SOT552-1 | 訂單產(chǎn)品 |
Register once, drag and drop ECAD models into your CAD tool and speed up your design.
Click here for more information74AUP2G58DP
Low-power dual PCB configurable multiple function gate
The 74AUP2G58 is a dual configurable multiple function gate with Schmitt-trigger inputs. Each gate within the device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND.
This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Low static power consumption; ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數(shù)類型
| 型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AUP2G58DP | 0.8?-?3.6 | CMOS | ± 1.9 | 8.7 | 70 | 2 | ultra low | -40~125 | 120 | 30 | TSSOP10 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
|
|
封裝
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74AUP2G58DP | 74AUP2G58DPJ (935304476118) |
Active | aK |
TSSOP10 (SOT552-1) |
SOT552-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT552-1_118 |
環(huán)境信息
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74AUP2G58DP | 74AUP2G58DPJ | 74AUP2G58DP |
|
|
Series
文檔 (13)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74AUP2G58 | Low-power dual PCB configurable multiple function gate | Data sheet | 2023-07-31 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| SOT552-1 | 3D model for products with SOT552-1 package | Design support | 2020-01-22 |
| aup2g58 | 74AUP2G58 IBIS model | IBIS model | 2015-04-02 |
| Nexperia_document_QIC_DualPCB_Configurable_Logic_201712 | Dynamically create your own combination logic device | Leaflet | 2017-12-21 |
| Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Leaflet | 2019-04-12 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| TSSOP10_SOT552_mk | plastic, thin shrink small outline package; 10 leads; 0.5 mm pitch; 3 mm x 3 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
| SOT552-1 | plastic, thin shrink small outline package; 10 leads; 0.5 mm pitch; 3 mm x 3 mm x 1.1 mm body | Package information | 2025-03-19 |
| SOT552-1_118 | TSSOP10; Reel pack for SMD, 13''; Q1/T1 product orientation | Packing information | 2020-04-21 |
| 74AUP2G58DP_Nexperia_Product_Reliability | 74AUP2G58DP Nexperia Product Reliability | Quality document | 2025-03-20 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
|
|
訂購(gòu)、定價(jià)與供貨
| 型號(hào) | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購(gòu)買(mǎi) |
|---|---|---|---|---|---|---|
| 74AUP2G58DP | 74AUP2G58DPJ | 935304476118 | Active | SOT552-1_118 | 2,500 |
|
樣品
作為 Nexperia 的客戶，您可以通過(guò)我們的銷售機(jī)構(gòu)訂購(gòu)樣品。
如果您沒(méi)有 Nexperia 的直接賬戶，我們的全球和地區(qū)分銷商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.