74HC2G32-Q100; 74HCT2G32-Q100
Applications
The 74HC2G32-Q100; 74HCT2G32-Q100 is a dual 2-input OR gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
- Wide supply voltage range from 2.0 V to 6.0 V
- Input levels:
- For 74HC2G32-Q100: CMOS level
- For 74HCT2G32-Q100: TTL level
- Complies with JEDEC standard no. 7A
- Symmetrical output impedance
- High noise immunity
- Low power dissipation
- Balanced propagation delays
- Multiple package options
- ESD protection:
- MIL-STD-883, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
參數(shù)類型
| 型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HC2G32DC-Q100 | 2.0?-?6.0 | CMOS | ± 5.2 | 9 | 36 | 2 | low | -40~125 | 204 | 35.1 | 115 | VSSOP8 |
| 74HC2G32DP-Q100 | 2.0?-?6.0 | CMOS | ± 5.2 | 9 | 36 | 2 | low | -40~125 | 216 | 20.5 | 106 | TSSOP8 |
| 74HCT2G32DC-Q100 | 4.5?-?5.5 | TTL | ± 4 | 13 | 36 | 2 | low | -40~125 | 204 | 35.1 | 115 | VSSOP8 |
| 74HCT2G32DP-Q100 | 4.5?-?5.5 | TTL | ± 4 | 13 | 36 | 2 | low | -40~125 | 216 | 20.5 | 106 | TSSOP8 |
封裝
| 型號(hào) | 可訂購的器件編號(hào)，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74HC2G32DC-Q100 | 74HC2G32DC‑Q100H (935300851125) |
Active | H32 |
VSSOP8 (SOT765-1) |
SOT765-1 | SOT765-1_125 | |
| 74HC2G32DP-Q100 | 74HC2G32DP‑Q100H (935300852125) |
Active | H32 |
TSSOP8 (SOT505-2) |
SOT505-2 | SOT505-2_125 | |
| 74HCT2G32DC-Q100 | 74HCT2G32DC‑Q100H (935300853125) |
Active | T32 |
VSSOP8 (SOT765-1) |
SOT765-1 | SOT765-1_125 | |
| 74HCT2G32DP-Q100 | 74HCT2G32DP‑Q100H (935300854125) |
Active | T32 |
TSSOP8 (SOT505-2) |
SOT505-2 | SOT505-2_125 |
環(huán)境信息
| 型號(hào) | 可訂購的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74HC2G32DC-Q100 | 74HC2G32DC‑Q100H | 74HC2G32DC-Q100 |
|
|
| 74HC2G32DP-Q100 | 74HC2G32DP‑Q100H | 74HC2G32DP-Q100 |
|
|
| 74HCT2G32DC-Q100 | 74HCT2G32DC‑Q100H | 74HCT2G32DC-Q100 |
|
|
| 74HCT2G32DP-Q100 | 74HCT2G32DP‑Q100H | 74HCT2G32DP-Q100 |
|
|
文檔 (12)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74HC_HCT2G32_Q100 | Dual 2-input OR gate | Data sheet | 2023-11-17 |
| AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
| AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| mna166 | Block diagram: 74AHC1G32GV, 74AHC1G32GW, 74AHC2G32DC, 74AHC2G32DP, 74AHC2G32GD, 74AHCT1G32GV, 74AHCT1G32GW, 74AHCT2G32DC, 74AHCT2G32DP, 74AHCT2G32GD, 74AUP1G02GF, 74AUP1G02GM, 74AUP1G02GW, 74AUP1G32GF, 74AUP1G32GM, 74AUP1G32GW, 74HC1G32GV, 74HC1G32GW, 74HC2G32DC, 74HC2G32DP, 74HC2G32GD, 74HCT1G32GV, 74HCT1G32GW, 74HCT2G32DC, 74HCT2G32DP, 74HCT2G32GD | Block diagram | 2009-11-04 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| SOT765-1 | 3D model for products with SOT765-1 package | Design support | 2020-01-22 |
| SOT505-2 | 3D model for products with SOT505-2 package | Design support | 2019-01-18 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| VSSOP8_SOT765-1_mk | plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body | Marcom graphics | 2017-01-28 |
| SOT765-1 | plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body | Package information | 2022-06-03 |
| SOT505-2 | plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body | Package information | 2022-06-03 |
支持
如果您需要設(shè)計(jì)/技術(shù)支持，請(qǐng)告知我們并填寫 應(yīng)答表 我們會(huì)盡快回復(fù)您。
Ordering, pricing & availability
樣品
作為 Nexperia 的客戶，您可以通過我們的銷售機(jī)構(gòu)訂購樣品。
如果您沒有 Nexperia 的直接賬戶，我們的全球和地區(qū)分銷商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。