NXU0101-Q100
1-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state
The NXU0101-Q100 is a 1-bit, dual-supply level translating buffer with Schmitt-trigger input and 3-state output. It features one data input (A), one data output (YB), and an output enable input (OE).
Both VCCA and VCCB can be supplied at any voltage between 0.9 V and 5.5 V making the device suitable for translating between any of the voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V).
This device facilitates asynchronous communication between data buses. Transmit data with a fixed direction (unidirectionally) from the A bus to the B bus on one channel. The OE pin can be referenced to VCCA and VCCB domain and when OE pin is set LOW the output is disabled and enter a high-impedance OFF-state which isolates the buses. The OE pin can be left floating or externally pulled down to ground to ensure the high-impedance state of the output during power up or power down.
This device ensures low static and dynamic power consumption across the entire supply range and is fully specified for partial power down applications using IOFF. The IOFF circuitry prevents potentially damaging backflow current through the device when it is powered down or if one of the power supplies is disconnected (floating).
No power supply sequencing is required and output glitches during power supply transitions are prevented. As a result, glitches will not appear on the output for supply transitions during power-up/down.
Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range:
VCCA: 0.9 V to 5.5 V
VCCB: 0.9 V to 5.5 V
- Low power consumption for supply voltage range 1.1 V to 5.5 V
- 3 μA (Tamb = 25 °C)
- 5 μA (Tamb = -40 °C to +125 °C)
- Schmitt-trigger inputs with integrated static high ohmic pull-down resistor on the input
Maximum data rates:
250 Mbps (≥ 1.8 V to 5 V translation)
High output drive 12 mA at 5 V
Output enable (OE) allows connection to VCCA or VCCB domain
Suspend mode when either one of the supply voltages is below 100 mV or disconnected (floating)
Low noise overshoot and undershoot <10% of VCCO
IOFF circuitry provides partial power-down mode operation
Latch-up performance exceeds 100 mA per JESD78D Class II
Complies with JEDEC standard:
JESD8-12 (0.9 V to 1.3 V)
JESD8-11 (1.4 V to 1.6 V)
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD12-6 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2500 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1500 V
Applications
General purpose I/O level translation
Noisy environments or slow input signals
Supports push-pull voltage translation for clock signaling
Consumer
參數(shù)類型
| 型號 | Logic switching levels | Output drive capability (mA) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|
| NXU0101GM-Q100 | CMOS/LVTTL | ± 12 | 4 | ultra low | -40~125 | 264 | 129 | 5.1 | XSON6 |
| NXU0101GS-Q100 | CMOS/LVTTL | ± 12 | 4 | ultra low | -40~125 | 231 | 128 | 4.7 | XSON6 |
| NXU0101GW-Q100 | CMOS/LVTTL | ± 12 | 4 | ultra low | -40~125 | 177 | 128 | 34 | TSSOP6 |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| NXU0101GM-Q100 | NXU0101GM‑Q100X (935691961115) |
Active | L1 |
XSON6 (SOT886) |
SOT886 | SOT886_115 | |
| NXU0101GS-Q100 | NXU0101GS‑Q100H (935691962125) |
Active | L1 |
XSON6 (SOT1202) |
SOT1202 | 暫無信息 | |
| NXU0101GW-Q100 | NXU0101GW‑Q100H (935691954125) |
Active | L1 |
TSSOP6 (SOT363-2) |
SOT363-2 | SOT363-2_125 |
環(huán)境信息
| 型號 | 可訂購的器件編號 | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| NXU0101GM-Q100 | NXU0101GM‑Q100X | NXU0101GM-Q100 |
|
|
| NXU0101GS-Q100 | NXU0101GS‑Q100H | NXU0101GS-Q100 |
|
|
| NXU0101GW-Q100 | NXU0101GW‑Q100H | NXU0101GW-Q100 |
|
|
文檔 (16)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| NXU0101_Q100 | 1-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state | Data sheet | 2025-01-28 |
| AN90057 | Pin FMEA for NXU family | Application note | 2024-09-11 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
| SOT886 | 3D model for products with SOT886 package | Design support | 2019-10-03 |
| SOT1202 | 3D model for products with SOT1202 package | Design support | 2023-02-02 |
| SOT363-2 | 3D model for products with SOT363-2 package | Design support | 2023-02-02 |
| nxu0101 | NXU0101 IBIS model | IBIS model | 2024-10-31 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| DFN1410-6_SOT886_mk | plastic, extremely thin small outline package; no leads; 6 terminals; 0.6 mm pitch; 1 mm x 1.45 mm x 0.5 mm body | Marcom graphics | 2017-01-28 |
| XSON6_SOT886_mk | plastic, extremely thin small outline package; no leads; 6 terminals; 0.6 mm pitch; 1 mm x 1.45 mm x 0.5 mm body | Marcom graphics | 2017-01-28 |
| SOT886 | plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm body | Package information | 2022-06-01 |
| SOT1202 | plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1mm x 0.35 mm body | Package information | 2022-06-01 |
| SOT363-2 | plastic thin shrink small outline package; 6 leads; body width 1.25 mm | Package information | 2022-11-21 |
| MAR_SOT886 | MAR_SOT886 Topmark | Top marking | 2013-06-03 |
| MAR_SOT1202 | MAR_SOT1202 Topmark | Top marking | 2013-06-03 |
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