74LV08
Quad 2-input AND gate
The 74LV08 is a quad 2-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.
Features and benefits
Wide supply voltage range from 1.0 V to 5.5 V
CMOS low power dissipation
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C
Complies with JEDEC standards:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
參數(shù)類型
| 型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LV08D | 1.0?-?5.5 | TTL | ± 12 | 7.0 | 30 | 4 | low | -40~125 | 87 | 6.6 | 45 | SO14 |
| 74LV08PW | 1.0?-?5.5 | TTL | ± 12 | 7.0 | 30 | 4 | low | -40~125 | 127 | 3.1 | 51.4 | TSSOP14 |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LV08D | 74LV08D,118 (935063150118) |
Active | 74LV08D |
SO14 (SOT108-1) |
SOT108-1 |
SO-SOJ-REFLOW
SO-SOJ-WAVE WAVE_BG-BD-1 |
SOT108-1_118 |
| 74LV08PW | 74LV08PW,118 (935174280118) |
Active | LV08 |
TSSOP14 (SOT402-1) |
SOT402-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT402-1_118 |
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LV08DB | 74LV08DB,112 (935169270112) |
Obsolete | no package information | ||||
| 74LV08DB,118 (935169270118) |
Obsolete | ||||||
文檔 (15)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74LV08 | Quad 2-input AND gate | Data sheet | 2024-01-30 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| mna221 | Block diagram: 74AHC08BQ, 74AHC08D, 74AHC08PW, 74AHC2G08DC, 74AHC2G08DP, 74AHC2G08GD, 74AHCT08BQ, 74AHCT08D, 74AHCT08PW, 74AHCT2G08DC, 74AHCT2G08DP, 74AHCT2G08GD, 74AUP1G08GF, 74AUP1G08GM, 74AUP1G08GW, 74HC2G08DC, 74HC2G08DP, 74HC2G08GD, 74HCT2G08DC, 74HCT2G08DP, 74HCT2G08GD, 74LV08D, 74LV08DB, 74LV08N, 74LV08PW, 74LV125D, 74LV125DB, 74LV125N, 74LV125PW | Block diagram | 2009-11-03 |
| SOT108-1 | 3D model for products with SOT108-1 package | Design support | 2020-01-22 |
| SOT402-1 | 3D model for products with SOT402-1 package | Design support | 2023-02-02 |
| 74lv08 | 74lv08 IBIS model | IBIS model | 2016-05-25 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SO14_SOT108-1_mk | plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body | Marcom graphics | 2017-01-28 |
| TSSOP14_SOT402-1_mk | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
| SOT108-1 | plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body | Package information | 2023-11-07 |
| SOT402-1 | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-07 |
| SO-SOJ-REFLOW | Footprint for reflow soldering | Reflow soldering | 2009-10-08 |
| SO-SOJ-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
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