可訂購部件
| 型號 | 可訂購的器件編號 | 訂購代碼(12NC) | 封裝 | 從經(jīng)銷商處購買 |
|---|---|---|---|---|
| 74LVC3G04GS | 74LVC3G04GS,115 | 935292807115 | SOT1203 | 訂單產(chǎn)品 |
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Click here for more information74LVC3G04GS
Triple inverter
The 74LVC3G04 is a triple inverter. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V)
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
IOFF circuitry provides partial Power-down mode operation
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數(shù)類型
| 型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC3G04GS | 1.65?-?5.5 | CMOS/LVTTL | ± 32 | 175 | 3 | low | -40~125 | 281 | 149 | XSON8 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
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封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVC3G04GS | 74LVC3G04GS,115 (935292807115) |
Active | V4 |
XSON8 (SOT1203) |
SOT1203 | SOT1203_115 |
Series
文檔 (12)
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| 74LVC3G04 | Triple inverter | Data sheet | 2023-08-24 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-10-22 |
| Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
| SOT1203 | 3D model for products with SOT1203 package | Design support | 2023-02-02 |
| lvc3g04 | 74LVC3G04 IBIS model | IBIS model | 2015-01-15 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| XSON8_SOT1203_mk | plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body | Marcom graphics | 2019-02-04 |
| SOT1203 | plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body | Package information | 2022-06-03 |
| SOT1203_115 | XSON8; Reel pack for SMD, 7''; Q1/T1 product orientation | Packing information | 2020-04-21 |
| 74LVC3G04GS_Nexperia_Product_Reliability | 74LVC3G04GS Nexperia Product Reliability | Quality document | 2025-03-20 |
| MAR_SOT1203 | MAR_SOT1203 Topmark | Top marking | 2013-06-03 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
PCB Symbol, Footprint and 3D Model
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訂購、定價與供貨
| 型號 | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購買 |
|---|---|---|---|---|---|---|
| 74LVC3G04GS | 74LVC3G04GS,115 | 935292807115 | Active | SOT1203_115 | 5,000 |
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樣品
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.